Enhancement of diffusion of atoms into a heated substrate by bombardment

ABSTRACT

This invention describes a method of enhancing the diffusion of atomic species carried on the surface of a solid substrate into the substrate by elevating the temperature of the substrate to permit atoms and vacancies to propagate and then creating vacancies in selected regions of the substrate through bombardment by a beam of protons or other particles, said bombard-ment acting to enhance diffusion of the surface atom species into the substrate at said regions.

O United States Patent [1 1 [111 3,718,502

Gibbons [4 1 Feb. 27, 1973 ENHANCEMENT 0F DIFFUSION 0F 3,514,348 5 1970Ku ..148/188 ATOMS INTQA HEATED SUBSTRATE 3,481,776 12/1969 Manchester..117/212 3,420,719 1 1969 Potts ..148/188 BY BOMBARDMENT 3,351,50311/1967 Fotland ..148/188 [76] Inventor: James F. Gibbons, 735 De SotoDrive, Palo Alto, Calif. 94303 Primary Examiner-Ralph S. KendallAssistant Examiner-M. F. Esposito [22] Flled' 1969 Attorney-Flehr,Hohbach, Test, Albn'tton and Her- [21] Appl. No.: 866,692 bert 57ABSTRACT [52] US. Cl ..117/212, 117/38, 117/47 H, 1

117/213, 148/183, 148/188, 148/191 This invention describes a method ofenhancing the 51 Int. Cl ..B44d 1/18, B44d 1/20 diffusion of atomicSpecies tried on the Surface of a [58] Field of Search 17/212 933 38solid substrate into the substrate by elevating the teml 48,1188 Hperature of the substrate to permit atoms and vacancies to propagate andthen creating vacancies in selected regions of the substrate throughbombard- [56] References Cited ment by a beam of protons or otherparticles, said UNITED STATES PATENTS bombard-merit acting to enhancediffusion of the surface atom species into the substrate at saidregions. 3,562,022 2/1971 Shifrin ..148/188 3,523,042 8/1970 Bower eta1. ..148/188 29 Claims, 11 Drawing Figures S U B S T R ATE 12 {PI\\\\\\\\\\\\\\\'\\\ l DOPANT LAYER B CONTAINING DESIRED N ATO Ms 6 N HE AT B O M BA R D W 1T H D j 1 H IGH E N E R GY 13 h PROTONS VACANCYCONCENTRATION, cm

PAIEIITEDFEBZTIEIYS SHEET 10F 8 G I N SUBSTRATE DOPANT LAYER CONTAININGDESIRED ATOMS HEAT BOMBARD WITH 0 HIGH ENERGY N PROTONS I I I I I I I IVACANCY CONCENTRATION 5 Ev PROFILE DISTANCE FROM SURFACE,PM v INVENTOR IJAMES F GIBBONS 2 BY F/ 6 W M AI I'ORN FYi PATEN'IIEIJ SHEET 2 0F 8 6 TIO C ll SWIIO I l L O m M R R I U. HH E Ah M i; O I m T +QX .l C O O O/*F X D I RWS m U N D O V M N m 2 W U. O I m II B M II D E m m m w m 5 Mm m m m m m w zo ESzou Exams:

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JAMES F GIBBONS INVENTOR.

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JAMES F. GIBBONS INVENTOR.

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ATTORNEYS PAIEIIIEIIIEImIIIs I 3,718,502 SHEET 60F 8 A I SUBSTRATE OxIDELAYER B N C ETCH DEPOSIT LAYER D CONTAINING DESIRED ATOMS E HEAT ANDBOMBARD I N AND P ,4 SUBSTRATE WITH N LAYER CONTAINING TwO ATOM SPECIESJAMES'E GIBBONS F G 8 INVENTOR M,A4M ,M wumvyfi ATTORNEYS mm PATENTED ZSHEET 7 OF 8 3,718,502

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PATENTEB 75 8, O sumaora {1 5 2 N SUBSTRATE WITH P LAYER PREPARED I AsIN FIG 6.

PROTECTIVE MASK OXlDE OR OTHER I LAYER CONTAINING {JP TYPE DOPANT ATOMSN TYPE DOPANT OXIDE JAMES F. G BBONS I NVENTOR,

w) W ATTORNEYS ENHANCEMENT OF DIFFUSION OF ATOMS INTO A HEATED SUBSTRATEBY BOMBARDMENT BACKGROUND OF THE INVENTION This invention describes amethod for controlling and enhancing diffusion of atoms into a solidsubstrate by employing a beam of protons or other particles to raise theapparent temperature of the substrate and more particularly to the useof such a method in the formation of P-N junctions, alloyed contacts andohmic contacts in a solid substrate and in the control of surfaceeffects and reduction of surface imperfections.

In the prior art diffusion of atomic species predeposited on asemiconductor surface has, in general, been carried out at relativelyhigh temperatures. As a consequence, there has been resulting damage andimperfections formed, both in the diffused layers and elsewhere inthe'substrate, said damage and imperfections having detrimental effectson the characteristics of devices produced by the conventional diffusionprocess. This invention permits diffusion to occur without raising thesubstrate to the high temperatures that produce detrimental effects.

Diffusion of atoms into a substrate to form a junction or ohmic contact,in general, depends upon the movement of atoms into the crystallinelattice of the substrate. In general, the impurity atoms rest insubstitutional lattice sites in the host crystal or substrate. In orderfor the atoms to diffuse to an adjacent lattice site, the host atomoccupying the site must be moved away to create a vacant lattice siteand the impurity atom must be given sufficient energy to move into thevacant lattice site. Two energies correspond to these two processes: thehost atom must absorb an energy E, to escape from its lattice site, andthe impurity atom must absorb an energy E to migrate from its originalposition into the newly-created vacancy.

In a thermally-activated diffusion process, it can be shown that theprobability for the host atom to absorb an energy E is proportional towhere k is Boltzmanns constant and T is the absolute temperature; andsimilarly that the probability for the impurity atom to absorb an energyE,, is proportional The probability P t h at both of these events willoccur is proportional to the product of the individual probabilities, or

The diffusion coefficient for the impurity is proportional to theprobability P calculated above and can be expressed in the form D D -E'lkT E /k1' I As an example, in a conventional diffusion of boron intosilicon, the constants take on the values D my/(hr), E,- 3 eV and E 0.3eV. As a result, it is necessary to raise the temperature of the siliconto l,l0OC. to achieve a diffusion constant D 0.16 V/( Values of D ofthis magnitude are essential for efficient fabrication of semiconductordevices by the diffusion process, since the depth to which impurityatoms will diffuse from a surface is d-5 VZium where D is the diffusioncoefficient and t is the time in hours. To achieve boron doping to adepth d of lam in a silicon substrate, therefore, requires that thesilicon be held at 1,100C. for 1.5 hours. If a substantially lowertemperature is used, for example, 700C, the value of D given by Eq. (1)becomes so small that prohibitively long processing times are required.

It is clear from the above description that large values of D are usefulif diffusion processing is to be accomplished in reasonable times. It isalso clear that, if the diffusion process if thermally activated, largevalues of D can only be achieved by increasing T to large values. Insome cases this is acceptable, though many disadvantages can be cited.For instance, crystal imperfections form more easily and residualdislocation loops increase in size more rapidly at high temperaturesthan they do at low temperatures. Hence, in a thermally activateddiffusion, the process that permits the desired species to diffuse alsocreates undesirable imperfections in the crystal. These imperfectionsmay affect the diffusion of the desired species unfavorably and may alsoact as trapping centers for carriers. The trapping centers produce shortcarrier lifetimes, and, in general, have deleterious effects on theperformance of devices such as transistors and integrated circuits, andparticularly photodiodes, phototransistors and silicon vidicons.

Furthermore, the fabrication of electroluminescent diodes in siliconcarbide requires the formation of P-N junctions that must be diffused attemperatures of 1,800 2,000C. on account of the very high values of E,that characterize this material. These very high temperatures aredifficult to achieve. This makes accurate fabrication difficult and,furthermore, results in devices whose properties are frequentlydominated by the crystal imperfections introduced during hightemperature diffusion processes rather than the dopant which isintroduced.

OBJECTS AND SUMMARY OF THE INVENTION It is a general object of thepresent invention to provide a method of enhancing the diffusion ofdesired atom species into a solid substrate.

It is another object of the present invention to provide a method ofdiffusing desired atom species into a solid substrate at relatively lowtemperatures.

It is another object of the present invention to provide a method offorming P-N junctions, ohmic and alloyed contacts in a solid substrateby enhancing diffusion through the use of a proton or other high energybeam.

It is a further object of the present invention to provide a method oftreating semiconductor substrate to control electronic propertiescharacterizing the interfaces between the substrate and the oxidesurfaces forming interfaces therewith.

It is a further object of the present invention to provide a method inwhich energetic protons and other particles create lattice vacancies forenhancing the diffusion process.

The foregoing and other objects of the invention are achieved bysubjecting a solid substrate having a thin surface film containing thedesired atom species to be diffused into the substrate to bombardment byenergetic particles such as protons which create lattice vacancies andenhance the diffusion of the atom species into the substrate in thoseareas of the substrate where diffusion of the atom species into thesubstrate is desired.

The foregoing and other objects of the invention may become more clearlyapparent from the following description taken in connection with theaccompanying drawing.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A 1D show the steps in forminga P-N junction in accordance with the invention.

FIG. 2 shows the vacancy concentration profile for two particle beamenergies.

FIG. 3 shows the impurity profile for boron diffusion in a siliconsemiconductor wafer with proton energies of 10 keV.

FIG. 4 shows the impurity profile for boron diffusion in a siliconsemiconductor wafer with proton energies of 50 keV.

FIGS. 5A 5C show forming an inset region in a semiconductor substrate.

FIGS. 6A 6C show application of the process employing a mask to definethe diffusion region.

FIGS. 7A 7B show the steps in forming an N-P-N device in accordance withthe invention.

FIGS. 8A 8B show the steps in forming an N-P-N device by the use of asingle film or layer having two atom species.

FIGS. 9A 9B show the steps of forming an inset region with an oxideprotected junction.

FIGS. 10A 10C show the steps in forming an inset region in a device inwhich the atom species is captured by protected film.

FIGS. 11A 11F show the steps in forming a junction field effecttransistor.

DESCRIPTION OF PREFERRED EMBODIMENTS The method of the present inventionwill be first described in connection with the formation of a P-Njunction in a semiconductor substrate. Referring to FIG. 1A, thesubstrate may, for example, be a silicon wafer having impuritiescharacterizing N type semiconductor material. The wafer is suitablyetched and processed to provide a clean upper surface 11. Thereafter, bythermal deposition, evaporation from an elemental source, chemicaldeposition, ion implantation or other well known technique to thoseversed in the art, a shallow layer or film of material 12 containingatom species to be diffused into the semiconductor wafer is applied tothe upper surface of the slab, FIG. 1B. In order to form a P-N junction,in silicon, the layer of material 12 may, for example, be a relativelythin boron layer which is a P type dopant for silicon. The wafer is thenplaced in an evacuated chamber and means are provided within the chamberto elevate the temperature of the semiconductor wafer, FIG. 1C.Preferably, the temperature of the wafer is elevated to a temperature inwhich the interstitial lattice atoms and lattice vacancies moverelatively freely. This is generally well below typical diffusiontemperatures, being in the range of 450 700C. and above for silicon, and360 500C. and above for germanium. Thereafter, the surface of the deviceis bombarded with protons using conventional isotope separator equipmentwhich delivers protons to the wafer at any desired energy over a widerange of values, for example, between 1 keV to several hundreds keV. Thehigh energy particles create lattice vacancies which tend to diffusethrough the structure and enhance the diffusion of the P type boronatoms into the wafer to form the P- Njunction 13, FIG. 1D.

The proton bombardment is continued for a time adequate for the surfacedeposited atom species, boron in this instance, to diffuse to a desireddepth thereby forming the P-N junction 13 in the N type siliconsubstrate. Typically, the time required may be 0.5 to 1.5 hours, but canbe even shorter than this.

It is, of course, apparent that by starting with a P type substrate andproviding an N type layer or film and elevating the temperature andbombarding the wafer, a P-N junction having a diffused N type regionwith a P type substrate is formed. Furthermore, by applying a layercontaining atom species of the type characterizing the conductivity typeof the slab, an ohmic connection can be formed to the upper surface ofthe wafer. The ohmic contact can have a relatively high impurityconcentration thereby providing an ohmic contact having a very lowresistance.

Operation of the invention to enhance diffusion can be explainedqualitatively as follows. The energetic protons enter the target wherethey occasionally collide with atoms of the host crystal (substrate) anddislodge them from their lattice positions. Both the dislodged hostatoms and the resulting vacancies in the host crystal diffuse away fromtheir point of creation, propagating a region of high defectconcentration both toward the surface and deeper into the body of thecrystal. An adequate propagation effect can be achieved by maintainingthe crystal (substrate) at an elevated temperature. The temperaturerequired will depend on the substrate, being in the range of 450 700C.and above for silicon, 350 500C. and above for germanium. Thepropagation effect is necessary since otherwise dislodged host atoms maysimply fall back into the lattice sites from which they came with no neteffect; or possibly the vacancies produced from damage clusters,dislocation loops or other crystal imperfections.

When conditions for propagation of the bombardment-produced vacanciesare favorable, however, the vacancy concentration in the surface layersof the substrate can be increased several orders of magnitude above thevalue it would have at the substrate temperature in the absence ofproton bombardment. For qualitative purposes the increase in vacancyconcentration in the surface layers can be thought of as an increase inthe surface temperature of the substrate. Experimental results to bepresented later show that the equivalent temperature of the surfacelayers can be 1,000 l,200C. in a silicon target where the body ismaintained at a temperature of only 700C. This permits the atomspredeposited on the surface to diffuse rapidly into the semiconductoruntil they reach the cooler portions of the target. The. final result isthat impurity diffusion can be obtained to a depth determined by theenergy of the proton beam.

It should be mentioned that diffusion does not typically occur at depthssignificantly greater than the range of the protons, nor does it occuron those portions of the surface that may have been masked by standardtechniques or on which the beam is not allowed to fall as a result ofion focusing arrangements.

A variety of different impurity profiles can be obtained by properchoice of proton beam energy, dose rate, and diffusion time, as will beshown later. In every case permanent damage in the body of the target isavoided so the electronic properties and strength of the materialoutside the region of diffusion are far superior to what they would beif the predeposited species were driven into the target by aconventional thermally activated high temperature diffusion process.

Thus, the energetic protons create the lattice vacancies required fordiffusion. The mathematical effect is that the exponential involving E;will be eliminated in Eq. (I) with the result that D a D e V(x) 2. whereV(x) is the vacancy concentration profile produced by the bombardingprotons. This is a very important modification since it is the largevalue of E, in the exponent of Eq. (I) that requires that a hightemperature be reached before practical values of the diffusioncoefficient can be achieved. By controlling V(x), D can be controlledwithout raising the substrate to temperatures that produce imperfectionsor to diffusion temperatures which are difficult to achieve for certainmaterials such as silicon carbide.

Theoretical techniques exist for computing V(x). I have found that manydifferent forms'for V(x) can be obtained, depending on initial energy ofthe proton beam, the type of substrate used and the temperature at whichthe substrate is maintained during the process. To a first approximationV(x) takes the form where A and B are constants that have to do with theefficiency with which energetic protons produce vacancies, u is therange or average distance travelled by a proton in coming to rest in thecrystal, and 0' is a socalled range straggling parameter, common inparticle physics, which accounts for the fact that all protons do notsuffer exactly the same sequence of collisions, so there is adistribution in the stopping points for the protons about the average. Amore precise form for V(x) can be obtained by correcting p. and 0' forvacancy diffusion effects.

Precise computations of the vacancy concentration profiles including allvacancy diffusion effects have been made for a silicon target using twodifferent proton energies with the results shown in FIG. 2. For the caseof keV protons, the range p. of the protons is small (0.15 p. m), sothat the vacancies are all produced near the surface. The curve labelled50 keV shows V(x) for a higher energy proton beam where the proton rangeis deeper 0.55 n m).

A precise mathematical form for the diffusion coefficient D can beobtained by substituting these forms for V(x) into Eq. (2). It is thenpossible to solve the impuri ty diffusion equation using these spatiallyvarying diffusion constants to obtain precise predictions of theimpurity doping profiles which would be obtained. However, for presentpurposes, it will suffice to give a qualitative picture.

If a relatively low energy proton beam is used, so that V(x) takes onthe form labelled 10 keV in FIG. 2, only the vacancy concentration inthe surface layers of the target will take on a value substantiallydifferent from the thermal equilibrium value. Where the vacancyconcentration is high, the diffusion constant will take on a largevalue. As a result, doping atoms predeposited in the surface willdiffuse rapidly into the surface layers until they reach a depth whereV(x) falls rapidly back to its thermal equilibrium value. To a firstapproximation, the high vacancy concentration in the surface layers isequivalent to a very high temperature in the surface layers. Atoms candiffuse rapidly through this highly agitated region, but they stopabruptly when they reach the cooler" portions of the target (i.e.,portions not affected by the proton beam).

Typical experimental impurity profiles for bombardment-enhanceddiffusion of boron into silicon are shown in FIG. 3 for a 10 Kev, 40nanoampere proton beam and several different diffusion times. It will beclear to persons skilled in the art that the diffusion constant forboron in silicon has been increased many orders of magnitude over itsvalue at the substrate tem perature of 700C.

A similar analysis can be made for a vacancy concentration profile ofthe form shown in FIG. 2 for a 50 KeV proton beam. Here the equivalenthigh temperature layer is inside the crystal rather than on its surface,so the diffusion constant will be much higher inside the substrate thanit is on the surface. This results in very gradually graded impurityprofiles such as those shown in FIG. 4.

It should be noted that both abrupt impurity profiles such as thoseshown in FIG. 3 and gradually graded impurity profiles such as thoseshown in FIG. 4 are important in the semiconductor industry; and furtherthat a great variety of profiles in addition to those shown can begenerated by employing a sequence of different proton bombardment cyclesand substrates temperatures. Furthermore, the bombarding particles neednot be protons (e.g., electrons, neutrons, helium atoms or other speciescould be used); though protons have the advantage of producing vacanciesat depths of practical interest more efficiently than other types ofbombarding species.

The following description and figures are various examples of the use ofthe process in forming devices. These are only illustrative of the wideapplication of the process. One skilled in the art can readily adapt theprocess to enhance various diffusion processes.

FIG. 5 shows the formation of an inset P-N junction in a substrate. TheN type substrate, FIG. 5, is provided with a layer containing atoms ofthe species which is to be diffused into the substrate, for example, alayer of P type material such as boron. The substrate is then heated toa temperature in which the interstitial lattice atoms and latticevacancies move freely and it is then bombarded with high energyparticles, such as protons, over the selected area 14 as, for example,by controlling the proton beam to only impinge upon the selected area,by masking as will be presently described or other suitable means. Thebombardment causes the apparent temperature in the selected area orregion 14 whereby atoms from the P type layer diffuse into the substrateto a depth corresponding generally to the depth of proton or particlepenetration. Thereafter, the substrate may be treated by etching (notshown) to remove the layer and leave a planar P-Njunction in the device.

FIG. 6 illustrates the above process and shows the use of a mask fordefining the area which is bombarded. Thus, in FIG. 6A, there is shown asubstrate with a layer containing the desired species of atoms which areto be diffused. In FIG. 6B, there is shown a mask applied over the Ntype layer with an opening 15. The mask may be relatively thick oxide,metal or the like which prevents penetration of the beam particles intothe substrate in the area underlying the mask. Thereafter, the substrateis heated and the complete surface is bombarded to provide the N typediffusion shown in FIG. 6C.

FIG. 7 illustrates generally the use of the process in the formation ofan N-P-N junction. Thus, in FIG. 7A, there is shown a properly treatedsubstrate containing a P type layer. The substrate is then heated andbombarded over a selected area to form an inset P type region 16.Thereafter, there is provided a layer containing impurity atoms ofopposite conductivity type, for example, phosphorus atoms, FIG. 7C. Thewafer is then again heated and bombarded over a selected smaller regionor area to form another inset region 17. The wafer can then be treatedas, for example, by etching to remove the surface layers and leave adevice of the type shown in FIG. 7E.

FIG. 8A shows an N type substrate provided with a layer containing twoatom species having different diffusion constants. Thereafter, thesubstrate is heated and a selected area is bombarded with high energyparticles and the two atom species diffuse into the N type substrate atdifferent rates to form N and P inset regions in the substrate therebyforming an N-P-N device.

FIGS. 9A 9E illustrate the process in connection with a semiconductordevice having an oxide protected junction. FIG. 9A shows an N typesubstrate. Thereafter, the substrate is provided with an oxide layer 21,FIG. 9B. The oxide layer is etched to form a window or opening 22, FIG.9C, and thereafter, there is deposited a P type layer which may, forexample, be boron and which overlies the oxide 21 and is in contact withthe substrate at the window 22. The wafer or substrate is then heatedand bombarded to provide diffusion into the substrate to form an inset Ptype region 23. The wafer may then be suitably etched and diffused toform a P-N-P device having oxide protected junctions.

FIG. 10 illustrates another embodiment of the invention. In certainapplications, for example, in the fabrication of ohmic contacts andP-Njunctions on material such as Group III-V and Group II-VI compoundsof the lattice species may have such high vapor pressure that thelattice species escape from the surface during processing so the surfacemust be protected. In the example shown in FIG. 10, the substrate 24 hasapplied thereto a layer containing the desired impurity atoms 25.Thereafter, a layer 26 which may be a relatively thick protective oxidelayer or the like is deposited over the impurity dopant layer 25 toprevent escape of lattice species. The device is then heated andbombarded by suitable high energy particles such as proton particles tocause diffusion of the layer 25 in the region 2511 into the underlyingwafer. Thus, the proton beam completely penetrates the protective layer,elevates the temperature of the desired area whereby diffusion of theimpurity in layer 25 is enhanced into the material, while at the sametime the protective layer prevents the escape of lattice species due tohigh vapor pressures.

It is, of course, apparent that the method of the present invention canalso be applied to the formation of field effect transistors and thelike. An example of the application of the process in the formation offield effect transistors is shown in FIGS. 11A 11F.

A P layer 26 is first formed on a lightly doped N substrate 27 asdescribed in FIG. 6. An oxide or other protective mask 28 is then placedover selected areas of the surface as shown in FIG. 11B, and a layer 29containing P type dopant atoms is deposited. The material is then heatedand bombarded to diffuse the P type dopant into the previously diffusedP layer, producing heavily doped P+ source 30 and drain 31 contacts. Thesurface oxide and residual dopant are then etched away and a secondoxide layer 32 is placed over the surface in the position shown in FIG.11E. A layer 33 containing N type dopant atoms is then deposited and thematerial is heated and bombarded to produce a heavily doped N+ gatecontact 34, yielding the junction field effect transistor shown in FIG.11F. Alternately, a depletion mode metal-oxide-semiconductor (MOS) fieldeffect transistor can be fabricated by depositing an oxide layer overthe structure shown in FIG. 11D, leaving windows over the P+ regions tomake ohmic contact to the source and drain regions, and then, using wellknown masking and evaporation techniques, place an appropriate metallicgate electrode to lie parallel to the source and drain contactsoverlying the oxide layer in the region between said source and draincontacts.

From the foregoing description and explanation, it will be clear tothose versed in the art that both N and P type dopants can be diffusedinto a semiconductor substrate of either N or P type conductivity. Theprocess of the present invention can now be equally used for making bothP-N junctions, diffused resistors and ohmic contacts in a wide varietyof semiconductor materials. Materials such as copper, gold, platinum,lithium and chromium, that are commonly introduced into semiconductorsfor the purpose of controlling carrier lifetime or for producing highresistivity material by impurity compensation, can be diffused toprecise depths in selected areas through use of my present enhanceddiffusion process. The process can be repeated several times withdifferent dopants to form multiple N and P type layers such as arerequired in the fabrication of transistors, integrated circuits andsilicon controlled rectifiers and the like. Conventional oxide ornitride masking may be utilized on the wafer before the dopant isdeposited so that predeposition and diffusion of the impurity can belimited to those areas where it is desired, or ultimately the ion orparticle bean can be focused into selected areas of slabs so that theselective diffusion can occur without requiring the fabrication ofmasks. Furthermore, the process of the present invention can be employedto enhance diffusion of atoms into metals as well as semiconductors.

The process of the present invention can also be used to repair heavydamage that occurs during an ion implantation of a heavy atom. Thus, forexample, if boron is implanted into silicon at an energy of 80 keV, andthe material is annealed at 625C, either during the implantation ofafterward, then only percent of the boron atoms will have annealed intosubstitutional positions in the crystal, where they produce electricalconductivity. If the silicon is heated to l,l00C., nearly all of theboron atoms will anneal into substitutional positions and, therefore, beelectrically active in the crystal.

However, one of the major advantages sought in the ion implantationprocess is the possibility of processing semiconductor wafers at lowtemperatures. Therefore, annealing the crystal at 1,100C. defeats one ofthe major reasons for introducing dopant atoms by ion implantation.

From the previous description of the present invention, it will be clearthat the present invention can be used together with a low temperatureion implantation process to achieve an equivalent high annealingtemperature in the layers that contain the implanted species withoutraising the substrate to high temperatures. For example, an 80 keV boronimplantation can be performed into a silicon wafer that is held at atemperature of 700C. When sufficient boron ions have been implanted toachieve the desired conductivity, the boron beam may be switched off anda proton beam introduced, with the dose and energy of the protons beingselected to provide an equivalent temperature of approximately l,l00C.in the region where the implanted boron atoms lie. The proton beam isapplied for an adequate time min.) to ensure that the boron atoms willhave annealed into proper lattice positions.

Another application of this same type is related to repairing damageproduced at the interface between silicon and silicon-dioxide duringpreparation of the oxide. It is known by persons skilled in the art ofsilicon planar technology that when a surface layer of silicon dioxideis formed on a silicon substrate by any of the conventional techniques,undesirable surface states remain until the oxide layer has beenannealed at an elevated temperature on the order of 1,050C. Using theprocess of the present invention, the interfacial area between thesilicon and silicon dioxide, which contains the undesirable surfacestates, can be annealed without raising the substrate to hightemperatures that create imperfections in the substrate crystal.

Having thus described the preferred embodiments of the invention and setforth the basic steps of the process, it is not intended that thedescription be limited except as may be required by the appended claims.

Iclaim:

l. The method of enhancing diffusion of selected atom species in a solidsemiconductor substrate which comprises elevating the temperature of thesubstrate to a temperature which permits interstitial lattice atoms andlattice vacancies to move freely in the substrate, providing saidselected atom species at a surface of the substrate, and bombarding atleast one surface of said substrate while the temperature is elevatedwith a beam of non-dopant particles selected such that the particlescollide with atoms of the substrate to dislodge the atoms from theirlattice positions and create lattice vacancies which move freely in thesubstrate, said temperature being such that said lattice vacancies canmove to interact with said selected atom species to cause atoms of thespecies to diffuse in said substrate, said elevated temperature andparticles further being selected such that the bombarding particles donot cause gross damage in the substrate at said elevated temperature.

2. The method as in claim 1 wherein said temperature is below thetemperature which would produce significant diffusion of atomic speciesin the solid substrate.

3. The method as in claim 2 in which said selected atom species at asurface of the substrate is provided by the additional step ofpredepositing on said surface a layer of material containing theselected atom species which is to be diffused into the substrate.

4. The method as in claim 2 wherein said substrate is silicon and saidpredetermined temperature is in the range of 450 700C.

5. The method as in claim 2 wherein said substrate is germanium and theelevated temperature is in the range of 360 500C.

6. The method as in claim 3 wherein said predeposited layer is depositedonly over selected areas of the surface.

7. The method as in claim 2 including additionally providing a maskhaving one or more openings on said surface whereby to interceptparticles and prevent the formation of lattice vacancies in thesubstrate beneath the mask and permit particles to pass through saidopenings to bombard the substrate and form lattice vacancies in theregion of said openings by dislodging atoms from their latticepositions.

8. The method as in claim 2 wherein selected areas are bombarded byfocusing and directing the particle beam.

9. The method as in claim 2 wherein said particle beam comprises aproton beam having energies above 1 keV.

10. The method as in claim 1 wherein the damage previously existing inthe semiconductor is annealed on account of the enhanced diffusion.

11. The method as in claim 10 wherein the damage is produced byintroducing the atomic species using the ion implantation technique.

12. The method as in claim 10 wherein the damage is produced during theformation of an oxide layer or other protective coating on saidsemiconductor surface.

13. The method as in claim 10 wherein a protective layer is applied oversaid semiconductor to inhibit the escape of atomic species from thesurface during the enhanced diffusion.

14. The method of enhancing diffusion of selected atom species into asemiconductor substrate which comprises the steps of predepositing on atleast one surface of said substrate a layer of material containing theselected atom species, elevating the temperature of the substrate to atemperature which permits interstitial lattice atoms and latticevacancies to move freely in the substrate, said temperature being belowthe temperature which would produce significant diffusion of theselected atom species into the substrate, and simultaneously bombardingat said surface selected areas of the substrate with a non-dopantparticle beam for the substrate so that the particles collide with atomsin the substrate to dislodge atoms from their lattice position andcreate lattice vacancies which move freely in the substrate at saidelevated temperature to interact with said selected atom species at saidelevated temperature to enhance diffusion of the selected atom speciesfrom the surface into the substrate, said temperature and particle beambeing such that no gross damage is caused in the substrate.

15. The method as in claim 14 in which said substrate is semiconductivematerial characterizing one conductivity type and said layer containsatom species characterizing an opposite conductivity type to therebyform a region in said substrate which defines a rectifying junction insaid substrate.

16. The method as in claim 14 in which said substrate is semiconductormaterial characterizing one conductivity type and said layer containsatom species characterizing said one conductivity type.

17. The method as in claim 14 in which said substrate is semiconductormaterial characterizing one conductivity type and said layer containsatom species characterizing both said one conductivity type and anopposite conductivity type, said atom species of opposite conductivitytype having a higher diffusion coefficient than said atom species ofsaid one conductivity type whereby said atom species of said oppositeconductivity type diffuses further into said substrate than the atomspecies of said one conductivity type to form two rectifyingjunctions insaid substrate.

18. The method as in claim 14 in which said layer is applied on selectedareas of said surface.

19. The method as in claim 14 wherein a mask is provided over saidlayer, said mask containing openings in those regions which are to bediffused into said substrate and serving to inhibit penetration of saidparticles in said substrate in other regions.

20. The method as in claim 14 wherein said bombardment is focused anddirected to selected areas of said surface.

21. The method as in claim 15 in which there is provided the additionalstep of applying a second layer of said one conductivity type to saidsubstrate, elevating the temperature of the substrate, and thereafterbombarding said substrate to form a second region which forms arectifying junction with the first region.

22. The method as in claim 15 in which there is thereafter provided alayer of said opposite conductivity type, the temperature is elevatedand the surface is bombarded to form an ohmic connection to said region.

23. The method as in claim 14 in which the energy of said beam iscontrolled to provide diffusions at different depths in said substrate.

24. The method as in claim 14 wherein a protective coating is appliedover said layer and the energy of the bombarding beam is selected topenetrate said layer into said substrate whereby to inhibit the escapeof either predeposited atom species or semiconductor lattice atomspecies from the surface during the enhanced diffusion.

25. The method as in claim 14 wherein the predeposited layer of materialcontains atomic species that control carrier lifetime in saidsemiconductor.

e method as in claim 14 wherein the predeposited layer of materialcontains atomic species that act to compensate the doping effectprovided by atomic species previously introduced into the semiconductor.

27. The method of enhancing diffusion of selected atom species in asemiconductor substrate which comprises the steps of providing saidselected atom species, elevating the temperature of the substrate to atemperature which permits interstitial lattice atoms and latticevacancies to move freely in said substrate and bombarding at least onesurface of said substrate while the temperature is elevated with anon-dopant beam of particles selected such that the particles collidewith the atoms in the substrate to dislodge atoms from the latticepositions, said temperature selected whereby no gross damage is causedin the substrate by said particle beam, said particle beam serving tocreate lattice vacancies which move freely in the substrate at saidelevated temperature to interact with the atom species to enhance thediffusion of said selected atom species in the substrate.

28. The method as in claim 27 wherein said selected atom species isdeposited on said surface.

29. The method as in claim 27 wherein said particle beam comprises aproton beam having energies above 1 keV.

2. The method as in claim 1 wherein said temperature is below thetemperature which would produce significant diffusion of atomic speciesin the solid substrate.
 3. The method as in claim 2 in which saidselected atom species at a surface of the substrate is provided by theadditional step of predepositing on said surface a layer of materialcontaining the selected atom species which is to be diffused into thesubstrate.
 4. The method as in claim 2 wherein said substrate is siliconand said predetermined temperature is in the range of 450* -700*C. 5.The method as in claim 2 wherein said substrate is germanium and theelevated temperature is in the range of 360* - 500*C.
 6. The method asin claim 3 wherein said predeposited layer is deposited only overselected areas of the surface.
 7. The method as in claim 2 includingadditionally providing a mask having one or more openings on saidsurface whereby to intercept particles and prevent the formation oflattice vacancies in the substrate beneath the mask and permit particlesto pass through said openings to bombard the substrate and form latticevacancies in the region of said openings by dislodging atoms from theirlattice positions.
 8. The method as in claim 2 wherein selected areasare bombarded by focusing and directing the particle beam.
 9. The methodas in claim 2 wherein said particle beam comprises a proton beam havingenergies above 1 keV.
 10. The method as in claim 1 wherein the damagepreviously existing in the semiconductor is annealed on account of theenhanced diffusion.
 11. The method as in claim 10 wherein the damage isproduced by introducing the atomic species using the ion implantationtechnique.
 12. The method as in claim 10 wherein the damage is producedduring the formation of an oxide layer or other protective coating onsaid semiconductor surface.
 13. The method as in claim 10 wherein aprotective layer is applied over said semiconductor to inhibit theescape of atomic species from the surface during the enhanced diffusion.14. The method of enhancing diffusion of selected atom species into asemiconductor substrate which comprises the steps of predepositing on atleast one surface of said substrate a layer of material containing theselected atom species, elevating the temperature of the substrate to atemperature which permits interstitial lattice atoms and latticevacancies to move freely in the substrate, said temperature being belowthe temperature which would produce significant diffusion of theselected atom species into the substrate, and simultaneously bombardingat said surface selected areas of the substrate with a non-dopantparticle beam for the substrate so that the particles collide with atomsin the substrate to dislodge atoms from their lattice position andcreate lattice vacancies which move freely in the substrate at saidelevated temperature to interact with said selected atom species at saidelevated temperature to enhance diffusion of the selected atom speciesfrom the surface into the substrate, said temperature and particle beambeing such that no gross damage is caused in the substrate.
 15. Themethod as in claim 14 in which said substrate is semiconductive materialcharacterizing one conductivity type and said layer contains atomspecies characterizing an opposite conductivity type to thereby form aregion in said substrate which defines a rectifying junction in saidsubstrate.
 16. The method as in claim 14 in which said substrate issemiconductor material characterizing one conductivity type and saidlayer contains atom species characterizing said one conductivity type.17. The method as in claim 14 in which said substrate is semiconductormaterial characterizing one conductivity type and said layer containsatom species characterizing both said one conductivity type and anopposite conductivity type, saiD atom species of opposite conductivitytype having a higher diffusion coefficient than said atom species ofsaid one conductivity type whereby said atom species of said oppositeconductivity type diffuses further into said substrate than the atomspecies of said one conductivity type to form two rectifying junctionsin said substrate.
 18. The method as in claim 14 in which said layer isapplied on selected areas of said surface.
 19. The method as in claim 14wherein a mask is provided over said layer, said mask containingopenings in those regions which are to be diffused into said substrateand serving to inhibit penetration of said particles in said substratein other regions.
 20. The method as in claim 14 wherein said bombardmentis focused and directed to selected areas of said surface.
 21. Themethod as in claim 15 in which there is provided the additional step ofapplying a second layer of said one conductivity type to said substrate,elevating the temperature of the substrate, and thereafter bombardingsaid substrate to form a second region which forms a rectifying junctionwith the first region.
 22. The method as in claim 15 in which there isthereafter provided a layer of said opposite conductivity type, thetemperature is elevated and the surface is bombarded to form an ohmicconnection to said region.
 23. The method as in claim 14 in which theenergy of said beam is controlled to provide diffusions at differentdepths in said substrate.
 24. The method as in claim 14 wherein aprotective coating is applied over said layer and the energy of thebombarding beam is selected to penetrate said layer into said substratewhereby to inhibit the escape of either predeposited atom species orsemiconductor lattice atom species from the surface during the enhanceddiffusion.
 25. The method as in claim 14 wherein the predeposited layerof material contains atomic species that control carrier lifetime insaid semiconductor.
 26. The method as in claim 14 wherein thepredeposited layer of material contains atomic species that act tocompensate the doping effect provided by atomic species previouslyintroduced into the semiconductor.
 27. The method of enhancing diffusionof selected atom species in a semiconductor substrate which comprisesthe steps of providing said selected atom species, elevating thetemperature of the substrate to a temperature which permits interstitiallattice atoms and lattice vacancies to move freely in said substrate andbombarding at least one surface of said substrate while the temperatureis elevated with a non-dopant beam of particles selected such that theparticles collide with the atoms in the substrate to dislodge atoms fromthe lattice positions, said temperature selected whereby no gross damageis caused in the substrate by said particle beam, said particle beamserving to create lattice vacancies which move freely in the substrateat said elevated temperature to interact with the atom species toenhance the diffusion of said selected atom species in the substrate.28. The method as in claim 27 wherein said selected atom species isdeposited on said surface.
 29. The method as in claim 27 wherein saidparticle beam comprises a proton beam having energies above 1 keV.